Thank you to all of our paper and poster authors and presenters. Below are the top papers and posters.
Best Paper
Clock Controller Unit Design Metrics: Area, Power, Software flexibility and Congestion Impacts at System Level
Authors: Michele Chilla & Leonardo Gobbi, Qualcomm Ireland
Best Poster
Formal Verification Experiences: Silicon Bug Hunt with “Deep Sea Fishing
Authors: Ping Yeung, Mark Handover, & Abdel Ayari, Siemens EDA
Best Paper
5.2 Portable Stimuli Over UVM, Using Portable Stimuli in HW Verification Flow
Authors: Efrat Shneydor – Cadence Design Systems, Inc.
Slava Salnikov – Ben-Gurion University & Bengal Engineering & Science University
Liran Kosovizer – Texas Instruments
Shlomo Greenberg – Ben Gurion University
Best Paper
12.1: Using Constraints for SystemC AMS Design and Verification
Authors: Thilo Vörtler, Karsten Einwich – COSEDA Technologies
Muhammad Hassan – DFKI
Daniel Grosse – University of Bremen & DFKI GmbH
Best Paper
3.2: Between the Dialog and the Algorithm or Innovative Technological Narratives Leveraging the Idea of Authenticity in a Human Being
Authors: Hagai Arbel, Anna M. Ravitzki, and Uri Feigin – Vtool Ltd.
Best Paper
6.3: Complete Formal Verification of a Family of Automotive DSPs
Authors: Rafal A. Baranowski & Marco Trunzer – Robert Bosch GmbH
Best Paper
TA1.1: Is Your Testing N-wise or Unwise? Pairwise and N-wise Patterns in SystemVerilog for Efficient Test Configuration and Stimulus
Authors: Jonathan Bromley, Kevin Johnston – Verilab
Best Poster
P1.4: UVM and Emulation: How To Get Your Ultimate Testbench Acceleration Speed-up
Authors: Ahmed Yehia, Hans Van der Schoot – Mentor Graphics
Best Paper
UVM Ready: Transitioning Mixed-Signal Verification Environments to Universal Verification Methodology
Author: Arthur Freitas – Freescale Semiconductor
Best Poster
Understanding the Effectiveness of your System-Level SoC Stimulus Suite
Author: Robert Fredieu – Mentor Graphics