Digital Revolution is underway with breathtaking speed. New applications are emerging around us, such as autonomous driving, 5G mobile networks, artificial intelligence and virtual reality.
If you want to keep pace with the challenges and solutions around Digital Revolution, DVCon Europe is the right place for you. This year we will enjoy a great variety of Tutorial topics to help gain insights into new areas or deepen your expertise in existing ones – all in just one day!
Learning means growth and also personal development. I particularly like the DVCon tutorials format, because each of the sessions offers an excellent learning opportunity for the engineering community. If you have attended DVCon Europe before you will be aware that the tutorials are one of the most impressive parts of the conference, and a great place for gaining new insights.
With this blog I like to share the highlights of the upcoming tutorial program, which includes 16 highly technical tutorials, each 90 minutes in duration.
Many of the tutorials discuss practical experiences and give guidelines on how to make optimal use of existing (like SystemC, UVM) or emerging (like Portable Stimulus) Accellera or IEEE standards. Practical application of the Universal Verification Methodology will be shown in “UVM Audit: Assessing UVM testbenches to expose coding errors and improve quality” and also extended usage is a topic at “UVM mixed signal extensions – sharing best practice and standardization ideas” tutorial.
New and emerging standards, such as Portable Stimulus, are presented in “Accellera’s Portable Test and Stimulus: The Next Level of Verification Productivity is Here”. Applications of SystemC includes “Efficient use of Virtual Prototypes in Hardware-Software Development and Verification” and also “Developing and Testing Automotive Software on multi-SoC ECU architectures using Virtual Prototyping.”
Autonomous driving cars continue to be a hot topic, and one tutorial session covers “Developing and Testing Automotive Software on multi-SoC ECU architectures using Virtual Prototyping”. Two further automotive centric tutorials address design and verification for functional safety to comply with the ISO26262 standard.
The rise of Machine Learning is explored in tutorials “Machine Learning Introduction and Exemplary Application in Embedded Wireless Platforms” and also in “Accelerating the Path from Idea to Silicon for Computer Vision and Deep Learning in Automotive ICs.”
The tutorial day also includes mixed-signal with “Unifying Mixed-Signal and Low-Power Verification”. With the increase in RISC-V based development, we expect special interest for the tutorial on “RISC-V design and verification.”
A broadened view on how to plan, develop and verify complex systems will be presented in “Case Study of Verification Planning to Coverage Closure @Block, Subsystem and System-on-Chip level” and in “Requirements Driven Design Verification Flow.”
The need for more embedded software is getting addressed in “Firmware Firmly under Control: New Optimization and Verification Techniques for Application Specific Electronic Systems” and “Hardware and Software Co-verification in Hybrid HDL Simulation and Emulation Environment with QEMU.”
Not to forget, the use of formal verification is presented to improve the efficiency and effectiveness of verification “Using Mutation Coverage for Advanced Bug Hunting with Formal.”
It’s amazing to see how well DVCon Europe has become established across the design and verification community since its launch in 2014. Now we’re heading towards its 5th edition, on October 24-25, with Tutorial day at October 24th. As outlined, we will have a very rich tutorial program covering various design and verification standards, methodologies and tools for formal verification, functional safety, virtual prototyping, debug, software driven test, mixed-signal, and UVM. And also a broad mix of emerging applications. Welcome Digital Revolution, at whatever speed it comes.
We are looking forward to meet you at DVCon Europe in Munich!