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Call for Engineering Papers

The Design and Verification Conference & Exhibition Europe (DVCon Europe) is the premier European technical conference on system, software, design, verification, validation and integration. It is a place where the latest methodologies and technologies of tools, languages, and standards for integrated and embedded systems and products are shared and discussed.

Applications of interest include (but not limited to) automotive, mobile communication, aerospace, healthcare, chip-cards, consumer and power electronics. DVCon Europe solicits submissions related to industrial application or research in design and verification. Special interest areas are Digital Twin, Internet-of-Things, Functional Safety and Security, ML/AI, ADAS and Digitalization.

DVCon Europe 2024 accepts submissions of industrial and academic papers, tutorials and panels with highly technical content reflecting real life experiences as well as research topics.

An author of each accepted submission is required to:

  • Produce a paper for the official conference proceedings.
  • Sign and submit a copyright form.
  • Submissions must be original works that have not been published elsewhere. Papers may NOT be submitted to multiple DVCon conferences simultaneously, papers that are doubly submitted may be removed from both conferences.


In addition:

  • At least one of the authors will be required to attend the conference, pay the conference registration fee, and present the paper; failure to do so will mean the paper could be removed from the program and proceedings.
  • All presentations should be made available and uploaded 2 week before the conference.


Engineering submission:

  • This track is for Engineering papers, which will be presented during the conference. This is suitable for both papers that report on reflecting real life experiences and those reporting on research topics.

Topics

• Virtual prototyping and platforms
• Transaction-level modelling (e.g., SystemC TLM)
• Hardware-assisted prototyping
• Machine Learning for Software design
• Platforms for AI acceleration
• High-level synthesis from ESL languages

    • Modelling for Digital Twins and Digital Thread
    • Software for development and test automation
    • Model based methodologies, tools and techniques
    • Modelling languages (e.g. SysMLv2)
    • Interoperability of models and/or tools (e.g. FSS)
    • Hardware/software/embedded co-design

    • Verification process, reuse and resource management
    • Methods bridging between verification and validation
    • Hardware/software co-verification
    • Advanced methodologies, test benches, and flows (e.g., UVM, PSS)
    • Formal and semi-formal V&V techniques

    • AMS modelling for concept and system-level design
    • Application of mixed-signal extensions in verification (e.g., UVM-MS)
    • Real-number modelling approaches
    • Self-checking test benches in analog verification
    • Low-power design and verification (e.g., UPF)

    • IP tagging, protection or security
    • SoC and IP integration methods, flows, and tools
    • Configuration management of IPs including different abstraction level
    • Flow and tool automation (e.g., IP-XACT)

    • Functional safety standard compliance (e.g., ISO 26262)
    • Safety and security in verification and validation (e.g., ISO 21434)
    • Requirements-driven design and verification including traceability
    • New methods supporting functional safety, security and reliability

Paper Submission Process

Submissions will be in two parts, first an extended abstract, and then a full paper.

Initial paper submission:

The initial submission should be between a minimum of 600 words and a maximum of 1200 words (approximately 2 pages, not including diagrams, figures or tables).

The initial submission should include:

  • Related Work: Identify other work on which this submission will be built, and the novelty of the paper.
  • Application: Clearly describe the technical contribution, reflect real life experiences, and its industrial application.
  • (Preliminary) results: Summarize the results. State how these differ from previous work or state-of-the-art on the same subject.
  • Conclusions: Summarize major conclusions and findings presented in the paper.


Full paper submission:

Full papers must be maximum 8 pages long, and use the following template:

DVCon Europe 2024 Paper Template

Presentations:

Accepted authors must register for the conference, and be ready to give a presentation about their work. A copyright form will be required for all the material, both paper and presentation. Please note that presentations not presented onsite will be removed from the proceedings. 

Review Process:

  • After initial submission, papers will be peer reviewed. Thos papers selected will be invited to proceed to submit a full paper to the conference.
  • Full papers will also be peer reviewed and will either be accepted as full engineering papers, invited to be presented as a poster, or rejected at this stage. Both full engineering papers and posters will appear in the DVCon EU on-line proceedings.

Important Deadlines

  • April 22: Deadline for Initial Submission
  • May 27: Author Notification about Initial Submission
  • July 1: Full Submission Deadline
  • August 26: Author Notification about Full Paper Submission
  • September 16: Accepted Papers – Camera Ready Final Manuscript & Copyright Form Due
    • Registration Deadline for Accepted Papers/Posters

Questions?

DVCon Europe honors the Best Paper/Presentation and Best Poster submissions. The awards will be selected by the attendees at DVCon Europe based on the quality of both the paper and the presentation.

DVCon Europe Technical Program Chair:

Martin Ruhwandl, Infineon Technologies AG
Martin.Ruhwandl@infineon.com

DVCon Europe Technical Program Vice-Chair:

Joachim Geishauser, NXP Semiconductors
joachim.geishauser@nxp.com