The Design and Verification Conference & Exhibition Europe (DVCon Europe) is the premier European technical conference on system, software, design, verification, validation and integration. It is a place where the latest methodologies and technologies of tools, languages, and standards for integrated and embedded systems and products are shared and discussed.
Applications of interest include (but not limited to) automotive, mobile communication, aerospace, healthcare, chip-cards, consumer and power electronics. DVCon Europe solicits submissions related to industrial application or advanced research in design and verification. Special interest areas are Digital Twin, Internet-of-Things, Functional Safety and Security, ML/AI, ADAS and Digitalization.
DVCon Europe 2023 accepts submissions of industrial and academic papers, tutorials and panels with highly technical content reflecting real life experiences as well as research topics.
An author of each accepted submission is required to:
- Produce a paper for the official conference proceedings.
- Sign and submit a copyright form.
- All accepted presentations are expected to submit a video of their presentation in advance of the event. This does not replace participation in the event.
- One co-author on the paper is required to pay the Speaker Registration Fee.
- The speaker must present the paper at the conference. If anyone other than a co-author of the paper presents the paper at the conference, the paper will be removed from the proceedings.
- Virtual prototyping and Digital Twins
- Transaction-level modeling (e.g., SystemC TLM)
- Hardware-assisted prototyping
- Hardware/software/embedded co-design
- Machine Learning
- Software for verification
- Software development and verification
- Model based software design
- Low level software design and verification
- Model based tools and techniques for application level software.
- Verification process, reuse and resource management
- Methods bridging between verification and validation
- Hardware/software co-verification
- Advanced methodologies, testbenches, and flows (e.g., UVM, HDLs, HVLs)
- Formal and semi-formal V&V techniques
- High-level synthesis from ESL languages
- Interoperability of models and/or tools
- IP tagging, protection or security
- SoC and IP integration methods, flows, and tools
- Configuration management of IPs including different abstraction level
- Flow and tool automation (e.g., IP-XACT)
- Methods and flows for functional safety standard compliance (e.g., ISO 26262, DO-254)
- Safety and security in verification and validation (e.g., ISO 21434)
- Requirements-driven design and verification including traceability
- New methods and tools supporting functional safety and security
- AMS modeling for concept and system-level design
- Application of mixed-signal extensions in verification (e.g., UVM-AMS)
- Real-number modeling approaches
- Self-checking testbenches in analog verification
- Low-power design and verification (e.g., UPF)
Paper Submission Process
Submissions will be in two parts, first an extended abstract, and then a full paper.
Initial paper submission:
The initial submission should be between a minimum of 600 words and a maximum of 1200 words (approximately 2 pages, not including diagrams, figures or tables).
The initial submission should include:
- Related Work: Identify other work on which this submission will be built, and the novelty of the paper.
- Application: Clearly describe the technical contribution, reflect real life experiences, and its industrial application.
- (Preliminary) results: Summarize the results. State how these differ from previous work or state-of-the-art on the same subject.
- Conclusions: Summarize major conclusions and findings presented in the paper.
Full paper submission:
Full papers must be maximum 8 pages long, and use the following template:
DVCon Europe 2023 Paper Template
Accepted authors must register for the conference, and be ready to give a presentation about their work. A copyright form will be required for all the material, both paper and presentation. Please note that presentations not presented onsite will be removed from the proceedings.
The final presentation may only contain your company logo on the title slide, and must use the following template:
- After initial submission, papers will be peer reviewed. Thos papers selected will be invited to proceed to submit a full paper to the conference.
- Full papers will also be peer reviewed and will either be accepted as full engineering papers, invited to be presented as a poster, or rejected at this stage. Both full engineering papers and posters will appear in the DVCon EU on-line proceedings.
- May 1: Deadline for Initial Submission
- June 26: Author Notification about Initial Submission
- August 28: Full Paper Due
- September 26: Author Notification about Full Paper Submission
- October 9: Accepted Papers – Camera Ready Copies
- Registration Deadline for Accepted Papers/Posters
- October 16: Pre-Recorded Video/Copyright Form Submission Deadline
DVCon Europe honors the Best Paper/Presentation and Best Poster submissions. The awards will be selected by the attendees at DVCon Europe based on the quality of both the paper and the presentation.
DVCon Europe Technical Program Chair:
Mark Burton, Qualcomm