29 - 30 October, 2019

Munich, Germany

Event Details

MP Associates, Inc.
THURSDAY October 25, 3:15pm - 4:45pm | Forum 5
Functional Safety
Clemens Roettgermann - NXP Semiconductors
Coping with formalities. This session deals with how Verification Engineers ensure that their approaches keep up with the most challenging safety standards.

10.1Efficient Fault Injection Methods for Safety Software Testing based on Virtual Prototypes: Application to Powertrain ECU
Releasing cars without software and hardware defects requires close collaboration between semiconductor vendors, OEMs and tier-one OEM suppliers to provide safety mechanisms and related safe implementation approaches. Virtual prototypes (VP) and fault-injection are among diverse existing methods recommended by the ISO26262 standard to verify safety requirements. This paper presents a set of fault-injection methods to apply on virtual prototypes in order to validate safe execution of dependent system components. Using examples of safety critical software that implements the E-Gas level-3 monitoring concept and runs on a powertrain electronic control unit (ECU) model, we explain the different methods and highlight limitations and future working axes for semiconductor and tier-one OEM VP products.
 Speaker: Ons Mbarek - Robert Bosch GmbH
 Authors: Ons Mbarek - Robert Bosch GmbH
Dineshkumar Selvaraj - Infineon Technologies AG
Romero Chica Jose Miguel - Robert Bosch GmbH
Rajagopal Shenoy - Robert Bosch GmbH
Holger Riethmueller - Robert Bosch GmbH
10.2Improving the Confidence Level in Functional Safety Simulation Tools for ISO 26262
Higher Tool Confidence Level (TCL) is needed for tools used on the verification of safety-critical SoCs, aiming to achieve the required Automotive Safety Integrity Level in ISO 26262. This paper presents a methodology to improve the confidence level of functional safety verification flow. To do this, we compare the fault-list and fault annotation results of fault injection (FI) simulator with the ATPG flow for stuck-at (SA) fault types. Moreover, we compare fault coverage results by using test vectors generated by the ATPG so the result of the FI simulation is compared to the results gained from the ATPG. This is a way to improve simulator’s confidence level by taking advantage of strength of the ATPG.
 Speaker: Ahmet Cagri Bagbaba - Cadence Design Systems,GmbH
 Authors: Ahmet Cagri Bagbaba - Cadence Design Systems,GmbH
Felipe A. da Silva - Cadence Design Systems,GmbH & Delft Univ. of Technology
Christian Sauer - Cadence Design Systems,GmbH
10.3Qualification of a Verification IP under Requirement based Verification standards: An Approach to the Verification of the Verification
As metric driven verification has become the de-facto methodology to verify consumer application designs, more and more safety-related industries are looking into integrating UVM into their safety requirement standard. However, these industries face the challenge of rending random generation and requirement traceability compatible. Further to this, the requirement-based approach demands that the varication IP is qualified, therefore not letting protocol violations escaping protocol checkers. This verification of the verification IP requires to apply the traceable verification techniques to the verification IP itself. This paper presents an approach taken to verify a verification IP for the automotive SENT protocol targeted for ISO26262 applications. We describe the missing part of UVM for verification IP qualification, the library API developed in order to expect UVM_ERROR under error conditions and how we integrated this qualification in our Jenkins continuous integration flow for continuous qualification metrics over the project development process.
 Speaker: Francois Cerisier - Aedvices Consulting
 Authors: Francois Cerisier - Aedvices Consulting
Adrien Carmagnat - Aedvices Consulting
Alessandro Basili - Melexis
Gilles Curchod - Melexis