WEDNESDAY October 24, 4:00pm - 5:30pm | Forum 7
If you don’t measure, you don’t know. Verification planning and coverage metrics are crucial to track progress and achieve signoff. In particular, mutation coverage provides an accurate, intuitive account of the verification status, while detecting unverified, well-hidden error conditions missed by other formal and simulation coverage metrics. But how can we leverage mutation coverage to maximize the return on investment (ROI) of our formal verification effort?
This tutorial uses a case study and a practical example to demonstrate how formal model-based mutation coverage enables advanced bug hunting and continuous progress tracking. In addition, the tutorial will show how to achieve a meaningful integration of formal and simulation coverage metrics. A long-standing wish of many verification engineers and managers, coverage integration reduces effort overlap between simulation and formal, and enables faster, more rigorous signoff.
The tutorial agenda is as follow:
• Introduction to formal coverage
• Mutation coverage with formal – it’s not so tough!
• Bug hunting using mutation coverage: FIFO example
• Tracking verification progress and achieving signoff: I²C interface case study
• Integrating formal results with your preferred simulator and planning tool
• Summary and Q&A
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