29 - 30 October, 2019

Munich, Germany

Event Details

MP Associates, Inc.
THURSDAY October 25, 1:15pm - 2:45pm | Forum 6
Uwe Simm - Cadence Design Systems, Inc.
New Ideas on UVM (again).

7.1Automated Configuration of Verification Environments using Specman Macros
This paper describes a sophisticated Specman-based macro system that was used in the verification of a complex 16x16 switch device. The system allows for automatic configuration of individual ports using different protocols and bandwidth choices and enables exhaustive performance of test plans to verify the individual compliance of the ports and their interoperability. Furthermore, the system was setup by the core verification team in such a way that enabled an extended test team - even without deep knowledge of the device configuration details or mastery of verification techniques and language – to fully exercise the device in its multiple and varied configuration permutations. This allowed for fast-addition of new and additional verification engineers to the team (often engineers becoming released from other tasks at late stages of this project) in such a way they could contribute immediately to the project.
 Speaker: Milos Mirosavljevic - Veriest
 Authors: Dejan Janjic - Veriest
Milos Mirosavljevic - Veriest
Ron Sela - Valens Semiconductor Ltd.
Efrat Shneydor - Cadence Design Systems, Inc.
7.2Characterizing RF Wireless Receivers Performance in UVM Environment
Wireless telecommunication technologies grow rapidly, such as Wi-Fi, 2G/3G/4G cellular technologies, and various Internet of Things (IoT) networks which are all involved in many applications nowadays. Wireless communication has many advantages over its wired counterpart like mobility, easier configuration, easier setup and lower installation cost. On the other hand it has other many difficulties to handle, such as interference and noise. This led to developing various receiver architectures and modulation techniques. The main key metrics to characterize the receiver performance are the sensitivity and the interference tolerance. In this paper we show how we quantify these metrics in UVM verification environment based on calculating Packet Error Rate (PER) and Bit Error Rate (BER).
 Speaker: Ahmed Ibrahim - Si-Vision
 Authors: Salwa Elqassas - Si-Vision
Mohammed T. Abdel-Hafez - Si-Vision
Ahmed Nasr - Si-Vision
7.3Multi-Variant Coverage: Effective Planning and Modelling
Effective functional coverage is not a trivial job and involvement of multi-variant coverage (multiple coverage variants targeting different verification intents) makes it more challenging. The multi-variant coverage modelling is a well-known problem, but often overlooked in verification planning. This paper describes a coverage model targeting different verification requirements of the same DUT or IP with varying intents (conformance, exhaustive, and application), varying context (block-level and system-level), and varying versions (PHY-1, PHY-2, STACK-1, and STACK-2). To improve verification planning and modelling, we propose an efficient multi-variant coverage model, enabling reuse and improving upkeep quotients of verification cycles.
 Speaker: Dirk Hansen - Mentor, A Siemens Business
 Authors: Vikas Sharma - Mentor, A Siemens Business
Manoj Manu - Mentor, A Siemens Business