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Day 1 Panel: Anatomy of a Verification Flow

Nanette Collins
Nanette V. Collins Marketing & PR

Jean-Marie Brunet
Senior Director of Product Management and Engineering for the Scalable Verification Solutions Division
Siemens EDA

Alex Starr
AMD Corporate Fellow

Daniel Schostak
Arm Fellow and Verification Architect

Ty Garibay
Vice President of Engineering
Mythic AI

Nasr Ullah
Senior Director

Large companies, scale-ups and startups are eyeing new vertical market applications. Non-traditional semiconductor companies are entering the field as well with new business models and approaches. All are assessing markets as diverse as IoT, AI, 56/6G, HPC and healthcare, among others.

Timing is everything. Getting a chip designed, verified and ready for production requires an exceptionally talented group of knowledgeable and experienced experts. Possibly, the most important element for success is the verification flow. For a large company shifting into a fast-moving market, that could mean a major retooling effort. A startup may have more flexibility in planning its verification strategy, though it may be constrained by budget.

Join moderator Jean-Marie Brunet and panelists from Europe and the U.S. for a discussion on retooling a verification flow or designing a complete verification flow to meet the “must haves” of new market segments. They will address the types of tools and whether a standard “one size fits all” flow works in today’s environment and how to budget accordingly.