Leveraging Virtual Prototypes from Concept to Silicon: An Exploration of Best Practices

The challenges of verifying software and hardware in modern SoCs are many and varied. Verification is required at all stages, from the early conceptual phases of IP design and IP selection through system design to software bring up and optimisation. There is no one solution or set of tools that provides all the answers. The requirements at different stages of the design cycle can be radically different. One commonality in all the solutions is the availability of a consistent portfolio of models that support each stage of the process and address the varying requirements. This tutorial will overview the approach to modelling that we have taken at Arm to meet these requirements. We will explain the types of models that Arm delivers, how these models are developed and how they are deployed at all stages of the design process. The tutorial is intended to give a high-level overview into the many aspects of model usage and the benefits can be gained. We will include real-world examples of the application of the techniques described based on both our internal experiences. We will also show how we partner with members of the Arm ecosystem to provide a complete solution for the end users.

Event ID: 
b54a19cb-aa47-449e-932c-5af8f2732166
Event Type: 
Tutorial
Location: 
Forum 5
Event Time: 
Monday, October 16, 2017 -
16:00 to 17:30
Session Number: 
14
Session Number: 
14
Session Number Suffix: 
T
confID: 
234
Event Sponsor Image URL: 
https://dvcon.org/sites/dvcon-europe.org/files/images/logos/Arm_logo.png