Awards

The Three Body Problem: There’s more to building Silicon than what EDA tools currently help with

Peter Birch
VyperCore

Ben Marshall
PQShield

Clock Tree Design Considerations in The Presence of Asymmetric Transistor Aging

Prof. Dr. Freddy Gabbay PhD
Ruppin Academic Center, Israel

Firas Ramadan & Majd Ganaiem
Technion – Israel Institute of Technology

A Generic Configurable Error Injection Agent for On-Chip Memories

Anil Deshpande, Niharika Sachdeva, Arjun Suresh Kumar, Damandeep Saini, Ravi Teja Gopagiri, and Somasunder KS
Samsung Semiconductor India R & D Centre(SSIR)

Jaechul Park
Samsung Electronics, Korea

A Novel Approach to Expedite Verification Cycle using an Adaptive and Performance Optimized Simulator Independent Verification Platform Development

Harshal Kothari, Vinay Swargam, Sriram Kazhiyur, Sounderrajan
Somasunder, and Kattepura Sreenath

Testbench Flexibility as a Foundation for Success

Ana Sanz Carretero,
Katherine Garden, and Wei Wei Cheong
Xilinx

Paper/Slides

An Analysis of Stimulus Techniques for Efficient Functional Coverage Closure

Caglayan Yalcin &
Aileen McCabe
Qualcomm

Paper/Slides

Clock Controller Unit Design Metrics: Area, Power, Software flexibility and Congestion Impacts at System Level

Michele Chilla & Leonardo Gobbi
Qualcomm

Paper/Slides

Formal Verification Experiences: Silicon Bug Hunt with “Deep Sea Fishing”

Ping Yeung, Mark Handover, and Abdel Ayari
Siemens

Paper/Slides

Best Engineering Paper

Best Research Paper

Best Paper

Best Poster

Best Paper

Best Poster

Best Paper

Best Poster