Welcome to DVCon Europe 2021!

October 26-27, 2021 | Virtual Conference

Keynote Speakers

Petra
Product Thinker and Talk show host at Tolpagorni Product Management AB Petra comes from a tech background, with a Ph.D in Electronic System Design, joint research publication with Cadence Berkley Labs and formative years in the automotive industry. Eventually she started working herself up the software stack in a variety…
satishsundaresan
Satish Sundaresan heads Elektrobit India’s subsidiary based in Bengaluru. The India centre is a R&D location for Elektrobit and addresses local sales needs. Satish also heads a global product development team in the Validation space for Advanced Driver Assistance. Prior to Elektrobit, Satish managed large global p…
Rashid Attar Headshot
Rashid Attar is head of the ASIC/HW R&D department (for Qualcomm’s Corporate Research and Development division) which focuses on 5G and beyond RF (ICs, PAs, Algorithms, Interfaces, Packaging), Ultra-low power platform for always ON processors, Processors and Accelerators (CPU, Deep Learning Accelerators) and Antenna sys…
Petra
Product Thinker and Talk show host at Tolpagorni Product Management AB Petra comes from a tech background, with a Ph.D in Electronic System Design, joint research publication with Cadence Berkley Labs and formative years in the automotive industry. Eventually she started working herself up the software stack in a variety…
satishsundaresan
Satish Sundaresan heads Elektrobit India’s subsidiary based in Bengaluru. The India centre is a R&D location for Elektrobit and addresses local sales needs. Satish also heads a global product development team in the Validation space for Advanced Driver Assistance. Prior to Elektrobit, Satish managed large global p…
Rashid Attar Headshot
Rashid Attar is head of the ASIC/HW R&D department (for Qualcomm’s Corporate Research and Development division) which focuses on 5G and beyond RF (ICs, PAs, Algorithms, Interfaces, Packaging), Ultra-low power platform for always ON processors, Processors and Accelerators (CPU, Deep Learning Accelerators) and Antenna sys…

About DVCON Europe 2021

HUBS Virtual Reality Meeting

HUBS provides a virtual meeting space for attendees to interact and participate in the conference without the need for virtual reality gear.

Important Dates

August 11, 2021

SystemC Evolution Day 2021 – Call for Contributions is now open!

September 20, 2021

Accepted Papers: Camera Ready Copies & Copyright Form

September 27, 2021

Final/Video Presentation Deadline

October 2, 2021

Tutorial Presentation Deadline

Exhibitors & Sponsors

Exhibit & Sponsor Prospectus Now Available!

Deadline: September 17, 2021

The Design and Verification Conference & Exhibition Europe (DVCon Europe) is the premier European technical conference on system, software, design, verification, validation or integration. It is a place where the latest methodologies and technologies for the industrial use of tools, languages, and standards for integrated and embedded systems and products are shared and discussed.

The conference covers the application of standards, methodologies, and flows for system-level, hardware and software design, verification, validation, design automation and IP reuse.

Industry applications of interest include (but not limited to) automotive, mobile communication, aerospace, healthcare, chip-cards, consumer and power electronics. DVCon Europe solicits submissions related to advanced design and verification on special interest areas such as Digital Twin, Machine Learning, Internet-of-things, Functional safety and security, AI, ADAS and digitalization. 

DVCon Europe 2021 accepts submissions of papers, tutorials and panels with highly technical content reflecting real life experiences. Topics include (but are not limited to): System Level and Software Design, Model-Based and Model Supported Software Design, Verification & Validation, IP Reuse & Design Automation, Functional Safety and Security, and Mixed-Signal & Low-Power Design and Verification.

Latest Blog Articles

SystemC Evolution 2021

In addition to the Accellera SystemC Evolution Day, we are continuing the SystemC Evolution with smaller, regular, workshops. We refer to these workshops as fikas (Swedish, pronounced fee-ka), to honor the

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Get your Avatar ready!

The 2020 edition of the Design and Verification Conference & Exhibition Europe is just a day away – the conference takes place on October 27-28, 2020. But this isn’t a plain virtual

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Recent Publications

Elektronik I Norden:

Ett effektivt sätt att verifiera RISC-V-kärnor

Authors:
W. W. Chen, N. Tusinschi och T. L. Anderson, OneSpin Solutions

EENews Europe:

Discovering Deadlocks in Memory Controller IPs

Author:
Jef Verdonck

DVCon Europe 2020 Best Paper:

Clock Controller Unit Design Metrics: Area, Power, Software flexibility and Congestion Impacts at System Level


Authors:
Michele Chilla & Leonardo Gobbi, Qualcomm Ireland

DVCon Europe 2020 – Best Poster:

Formal Verification Experiences: Silicon Bug Hunt with “Deep Sea Fishing

Authors:
Ping Yeung, Mark Handover, & Abdel Ayari, Siemens EDA

All-Electronics Publication

Verification of the safety and functionality of RISC-V cores

Authors:
Nicolae Tusinschi, OneSpin Solutions

Photos From Previous Years

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