Welcome to DVCon Europe 2023!


November 14-15, 2023

Holiday Inn Munich – City Centre | Munich, Germany

Important Dates

May 1, 2023

Deadline to Submit Engineering Papers, Tutorials, and Panels

July 17, 2023

Deadline to Submit Research Papers

Call for Submissions

The Design and Verification Conference & Exhibition Europe (DVCon Europe) is the premier European technical conference on system, software, design, verification, validation and integration. It is a place where the latest methodologies and technologies of tools, languages, and standards for integrated and embedded systems and products are shared and discussed.

Applications of interest include (but not limited to) automotive, mobile communication, aerospace, healthcare, chip-cards, consumer and power electronics. DVCon Europe solicits submissions related to industrial application or by research in design and verification. Special interest areas are Digital Twin, Internet-of-Things, Functional Safety and Security, ML/AI, ADAS and Digitalization.

DVCon Europe 2023 accepts submissions of industrial and academic papers, tutorials and panels with highly technical content reflecting real life experiences as well as research topics.

Latest Blog Articles

Highlights of DVCon EU 2022

This post presents some of the highlights we jotted down the paper while attending DVCon Europe 2022 (6-7 December, Munich). This was the first face-to-face edition

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A DVCon Europe 2022 Summary

Jakob Engblom published his personal notes on DVCon Europe 2022 on his own blog. “The 2022 DVCon (Design and Verification) Europe conference was back in

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DVCon Europe 2022 Tutorials

The program for tutorial day (6th December) for DVCon Europe has been finished now! We are looking forward to 15 tutorials reflecting advances in Design

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DVCon Europe 2022 Keynotes

DVCon Europe 2022 Panels

Welcome from Munich

Message from Paul Kelleher, Vice President, Engineering, Qualcomm Ireland

Sneak Peek at Venue

Message from Lu Dai, Accellera Chair

Recent Publications

Tackling the Wild West of verification

Nick Flaherty

DVCon Europe best paper speeds up memory-controller tests

Tech Design Forum

DVCon Europe looks to network effects

Tech Design Form

A Novel Approach to Reuse Firmware for Verification of Controller based Sub-Systems using PSS

eeNews Europe 

Keynotes speakers for Europe’s Design and Verification Conference

eeNews Europe
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Photos From Previous Years

2023 Sponsors

Coming Soon