Munich, Germany – 17th November 2025 - The Design and Verification Conference & Exhibition Europe (DVCon Europe), continues to grow, featuring more exhibitors and tutorials, as well as attracting increasing numbers of attendees. The research content from academic and research institutes is also expanding, with more papers every year. DVCon Europe, held this year on 14th and 15h October, with SystemC Evolution Day on the 16th, is hosted by Accellera Systems Initiative.
Program highlights included keynotes and papers on open source and virtual prototyping, as well as AI, automotive and federated simulation. A panel session discussed the challenges of systems-of-systems design and how industry-broad ecosystems could support this better.
Mark Burton, the General Chair of DVCon Europe, said, “DVCon Europe continues to evolve and to expand, and we are particularly pleased with the growing contributions from universities and research organizations. We have also found an excellent blend with the engineering track.”
The Best Paper Award in the engineering category was split between two teams. Thorsten Dworzak and Johannes Grinschgl from Infineon Technologies AG won for ‘The Test Bench Factory: Building Verification Environments Faster, Better, Smarter’. Mark Burton, Mahmoud Kamel and Alwalid Salama from Qualcomm won for ‘Simulation Time Federation using the Zenoh framework between SystemC's and QEMU’.
Best Research Paper was awarded to ‘Minimally Intrusive Safety and Security Verification of Rust RTIC Applications’ by Pawel Dzialo, Per Lindgren and Malte Munch of the Luleå University of Technology, with Ivar Jönsson, Erik Serrander and Johan Eriksson of Grepit AB.
Another standout was a paper entitled ‘Harnessing a Digital Twin for Personalized Type-1 Diabetes Care: A Model for Glucose Control and Insulin Administration’ by a team of bachelor’s students from Cairo University (working with Siemens Digital Industries Software) which won a newly created Award named ‘General Chair’s Favorite presentation’.
DVCon Europe 2026 will be held in Munich on 17 and 18 November 2026, followed by SystemC Evolution Day on 19 November 2026.
ABOUT DVCON EUROPE
The Design and Verification Conference & Exhibition in Europe (DVCon Europe) is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Hosted by Accellera Systems Initiative, and one of several DVCon events around the globe, DVCon Europe brings chip architects, design & verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design. For more details, visit www.dvcon-europe.org. Follow #dvconeurope on X.
DVCon around the world:
- DVCon U.S. – March 2-5, 2026
- DVCon China – April 22, 2026
- DVCon India – September 1-3, 2026
ABOUT ACCELLERA SYSTEMS INITIATIVE
Accellera Systems Initiative (Accellera) is an independent, not-for profit organization, dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit accellera.org. For membership information, please email membership@accellera.org. Follow @accellera on Twitter or to comment, please use #accellera.
ACCELLERA GLOBAL SPONSORS: Cadence; Siemens; Synopsys
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Accellera Systems Initiative and DVCon are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners