October 15-16, 2024Holiday Inn | Munich, Germany

The Design and Verification Conference in Europe (DVCon Europe) is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, design and verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design.

Keynote Speakers

Infineon Technologies
Stealth AI Startup

September 16, 2024
Accepted Papers - Camera Ready Final Manuscript Due
September 16, 2024
Registration Deadline for Accepted Authors

DVCon Europe 2024 offers for the first time a SystemC Modeling Challenge -- with a have a vast set of great prizes and also traveling grants (kindly sponsored by Huawei).

How accurate can you estimate power/energy consumption of embedded HW/SW systems?
Bring your power estimation methods to DVCon Europe community!

Find more information please register on https://dvconchallenge.de – we will provide you

a SystemC template: fill in your method for power estimation
a measured power consumption data set: use it to create your power estimation method – calibration, machine learning, whatever, be creative!
a test bench: it will be used to expose your power estimation method to an unknown scenario for evaluation.

Students and participants from developing countries can apply for travel grants.

Gold Sponsors

Silver Sponsors

Best Paper Award Sponsor

SystemC Modeling Challenge (Sponsored by Huawei)

The ninth SystemC Evolution Day is a full-day, technical workshop on the evolution of SystemC standards to advance the SystemC ecosystem. In several in-depth sessions, selected current and future standardization topics around SystemC will be discussed in order to accelerate their progress for inclusion in Accellera/IEEE standards.

SystemC Evolution Day is intended as a lean, user-centric, hands-on forum bringing together experts from the SystemC user community and the Accellera Working Groups to advance SystemC standards.

Registration opens for DVcon Europe 2024
eeNews Europe
The Three Body Problem for ASIC design
eeNews Europe
DVCon Europe Announces Keynotes for 2024
SemiWiki
Clock Tree Design Considerations in The Presence of Asymmetric Transistor Aging
eeNews Europe

My Journey with DVCon Europe: A Decade of Innovation and Community
July 30, 2024
DVCon Europe SystemC Modeling Challenge
July 16, 2024
Welcome to DVCon Europe 2024!
September 11, 2024
Reflecting on the DVCon Europe 2024 Keynotes
August 13, 2024

Keynote Speakers

Important Dates

DVCon Europe SystemC Modeling Challenge

DVCon Europe Sponsors & Exhibitors

Gold Sponsors

Silver Sponsors

Best Paper Award Sponsor

SystemC Modeling Challenge (Sponsored by Huawei)

SystemC Evolution Day 2024

Recent Publications

Latest Blog Articles

Conference Sponsor

Global Sponsors

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